This invention relates to semiconductor circuits and more particularly to a delay circuit of the type useful clock generators in semiconductor memory devices or the like.
In semiconductor memory devices of the type described in Electronics, Sept. 26, 1978, pp. 109+, or pending application Ser. No. 944,822, and now U.S. Pat. No. 4,239,993, clock generators are employed which have output driver circuits for driving capacitive loads between a low level, usually ground, and a high level of the supply voltage or a one-threshold drop from the supply voltage. The latter type is usually faster in operation than the former, i.e., introduces a smaller increment of delay. In some instances the clock output should go to the supply but the initial transition should be a small delay increment, so neither type of clock driver is suitable.
It is therefore the principal object of this invention to provide an improved clock driver circuit, particularly one which introduces a small delay increment but yet may be pumped to a full supply voltage level.